| 以太无源光网络接入控制器的实现 |
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| 引用本文： | 邹君妮,陈健,林如俭.以太无源光网络接入控制器的实现[J].上海大学学报(英文版),2006,10(5):425-430. |
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| 作者姓名： | 邹君妮 陈健 林如俭 |
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| 作者单位： | School of Communication and Information Engineering Shanghai University Shanghai 200072 P.R. China，School of Communication and Information Engineering Shanghai University Shanghai 200072 P.R. China，School of Communication and Information Engineering Shanghai University Shanghai 200072 P.R. China |
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| 基金项目： | Project supported by Science Foundation of Shanghai Municipal Commission of Science and Technology (Grant No .04dz12045) |
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| 摘 要： | 1IntroductionWith the developing of packet switching and trans-mission technologies,many IP-oriented applicationshave experienced a substantial growth,makingit pos-sible for various real-ti me broadband video servicesviathe Internet.However,current access networktechnologies can only offer512k-2M subscriberbandwidth,whichis unable to meet the broadband de-mand of emerging3Tnet services such as high-defini-tion video(HDTV)and real-ti me network TV broad-cast.Therefore,the access network sti…
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| 关 键 词： | 光网 以太网 宽带接入 现场可编程门阵列 嵌入式系统 |
| 文章编号： | 1007-6417（2006）05-0425-06 |
| 收稿时间： | 2004-11-30 |
| 修稿时间： | 2005-05-25 |
Implementation of access controller for ethernet passive optical network |
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| Jun-ni Zou Ph. D. Candidate,Jian Chen,Ru-jian Lin.Implementation of access controller for ethernet passive optical network[J].Journal of Shanghai University(English Edition),2006,10(5):425-430. |
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| Authors: | Jun-ni Zou Ph D Candidate Jian Chen Ru-jian Lin |
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| Abstract: | This paper presents the design and implementation of access controller used for Ethernet passive optical network (EPON). As a first step to develop an ASIC product, the entire system is designed on a field programmable gate array (FPGA) with an embedded CPU. To reduce working frequency of the FPGA, the byte-to-word conversion is proposed. Propagation delays are equalized by ranging procedure so as to avoid data collision. Implementations of synchronization, classification, as well as Linux porting are illustrated in detail. The interface between the FPGA and CPU are also presented. Experimental results show that the proposed system can properly function in a relatively low cost FPGA. |
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| Keywords: | Ethernet passive optical network broadband access field programmable gate array embedded system |
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