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小功率高频数字控制DC/DC 变换器设计
引用本文:高艳霞,郭水保,ALLARD Bruno.小功率高频数字控制DC/DC 变换器设计[J].上海大学学报(英文版),2008,12(5):450-456.
作者姓名:高艳霞  郭水保  ALLARD Bruno
基金项目:Project supported by the Power Electronics Science Education Development Program of Delta Environmental & Education Foundation (Grant No.DERO2007014), and the Scientific Service of the Embassy of France in China (Grant No.K06D20)
摘    要:This paper models a low-power high-frequency digitally controlled synchronous rectifier (SR) OUCK converter. The converter is a hybrid system with three operation modes. Digital PID controler is used. Key problems such as quantization resolution of digital pulse-width modulation (DPWM) and steady-state limit cycles of digital control switching model power supply (SMPS) are discussed, with corresponding solutions presented. Simulation of a digital control synchronous buck is performed with a fixed-point algorithm. The results show that the described approach enables high-speed dynamic performance.

关 键 词:小功率高频  数字控制  DC/DC变换器  设计方法  DPWM
收稿时间:2007-07-09
修稿时间:2007-09-25

Design of low-power high-frequency digital controlled DC-DC switching power converter
GAO Yan-xia,GUO Shui-bao,LIN-SHI Xue-fang,ALLARD Bruno.Design of low-power high-frequency digital controlled DC-DC switching power converter[J].Journal of Shanghai University(English Edition),2008,12(5):450-456.
Authors:GAO Yan-xia  GUO Shui-bao  LIN-SHI Xue-fang  ALLARD Bruno
Institution:1. School of Electromechanical Engineering and Automation, Shanghai University, Shanghai 200072, P. R. China
2. School of Electromechanical Engineering and Automation, Shanghai University, Shanghai 200072, P. R. China;Lab. AMPERE, CNRS UMR 5005, Institut National des Sciences Appliqu e es de Lyon, Villeurbanne 69621, France
3. Lab. AMPERE, CNRS UMR 5005, Institut National des Sciences Appliqu e es de Lyon, Villeurbanne 69621, France
Abstract:This paper models a low-power high-frequency digitally controlled synchronous rectifier (SR) buck converter. The converter is a hybrid system with three operation modes. Digital PID controler is used. Key problems such as quantization resolution of digital pulse-width modulation (DPWM) and steady-state limit cycles of digital control switching model power supply (SMPS) are discussed, with corresponding solutions presented. Simulation of a digital control synchronous buck is performed with a fixed-point algorithm. The results show that the described approach enables high-speed dynamic performance.
Keywords:digital control  digital pulse-width modulation (DPWM)  limit cycle  buck converter
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