| 一种新型优化热载流子退化效应的SOI-LIGBT(英文) |
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| 引用本文： | 黄婷婷,刘斯扬,孙伟锋,张春伟.一种新型优化热载流子退化效应的SOI-LIGBT(英文)[J].东南大学学报,2014(1):17-21. |
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| 作者姓名： | 黄婷婷 刘斯扬 孙伟锋 张春伟 |
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| 作者单位： | 东南大学国家 ASIC 系统工程技术研究中心,南京210096 |
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| 基金项目： | The National Natural Science Foundation of China （No. 61204083）, the Natural Science Foundation of Jiangsu Province （No. BK2011059）, the Program for New Century Excellent Talents in University （ No. NCET-10-0331 ）. |
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| 摘 要： | 提出了一种新型绝缘体上硅横向绝缘栅双极型晶体管(SOI-LIGBT),该晶体管在沟道下方的P型体区旁增加了一个特殊的低掺杂P型阱区,在不增加额外工艺的基础上减小了器件线性区电流的退化.分析了低掺杂P阱的宽度和深度对SOI-LIGBT器件热载流子可靠性的影响.通过增加低掺杂P型阱区的宽度,可以减小器件的纵向电场峰值和碰撞电离峰值,从而优化器件的热载流子效应.另外,增加低掺杂P型阱区的深度,也会减小器件内部的碰撞电离率,从而减弱器件的热载流子退化.结合低掺杂P型阱区的作用和工艺窗口大小的影响,确定低掺杂P型阱区的宽度和深度都为2μm.
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| 关 键 词： | 绝缘栅双极型晶体管 绝缘体上硅 热载流子效应 优化 |
Novel lateral insulated gate bipolar transistor on SOI substrate for optimizing hot-carrier degradation |
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| Huang Tingting,Liu Siyang,Sun Weifeng,Zhang Chunwei.Novel lateral insulated gate bipolar transistor on SOI substrate for optimizing hot-carrier degradation[J].Journal of Southeast University(English Edition),2014(1):17-21. |
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| Authors: | Huang Tingting Liu Siyang Sun Weifeng Zhang Chunwei |
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| Institution: | Huang Tingting, Liu Siyang, Sun Weifeng, Zhang Chunwei |
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| Abstract: | A novel lateral insulated gate bipolar transistor on a silicon-on-insulator substrate SOI-LIGBT with a special low-doped P-well structure is proposed.The P-well structure is added to attach the P-body under the channel so as to reduce the linear anode current degradation without additional process.The influence of the length and depth of the P-well on the hot-carrier HC reliability of the SOI-LIGBT is studied.With the increase in the length of the P-well the perpendicular electric field peak and the impact ionization peak diminish resulting in the reduction of the hot-carrier degradation. In addition the impact ionization will be weakened with the increase in the depth of the P-well which also makes the hot-carrier degradation decrease.Considering the effect of the low-doped P-well and the process windows the length and depth of the P-well are both chosen as 2 μm. |
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| Keywords: | lateral insulated gate bipolar transistor LIGBT silicon-on-insulator SOI hot-carrier effect HCE optimi-zation |
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