New design of sense amplifier for EEPROM memory |
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| Authors: | Dong-sheng Liu Xue-cheng Zou Qiong Yu Fan Zhang |
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| Institution: | (1) Department of Electronic Science and Technology, Huazhong University of Science and Technology, Wuhan, 430074, China |
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| Abstract: | We present a new sense amplifier circuit for EEPROM memory. The topology of the sense amplifier uses a voltage sensing method, having low cost and low power consumption as well as high reliability. The sense amplifier was implemented in an EEPROM realized with an SMIC 0.35-μm 2P3M CMOS embedded EEPROM process. Under the condition that the power supply is 3.3 V, simulation results showed that the charge time is 35 ns in the proposed sense amplifier, and that the maximum average current consumption during the read period is 40 μA. The novel topology allows the circuit to function with power sup-plies as low as 1.4 V. The sense amplifier has been implemented in 2-kb EEPROM memory for RFID tag IC applications, and has a silicon area of only 240 μm2. |
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| Keywords: | EEPROM Sense amplifier (SA) Voltage sensing Bidirectional conduction |
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