| 基于FPGA16位格雷码译码与显示电路的设计 |
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| 引用本文： | 童加斌.基于FPGA16位格雷码译码与显示电路的设计[J].襄樊职业技术学院学报,2008,7(6):15-17. |
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| 作者姓名： | 童加斌 |
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| 作者单位： | 随州职业技术学院,湖北,随州,441300 |
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| 摘 要： | 在光纤通信中。利用FPGA实现绝对式光电编码器格雷码输出译码和显示电路。本设计包括FPGA的硬件电路设计，硬件电路的功能，VHDL语言设计方案和实现方法以及采用JTAG边界扫描测试标准实现电路的在线系统编程（ISP）。
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| 关 键 词： | FPGA VHDL JTAG ISP 格雷码 显示译码 |
FPGA-Based 16 Leige Stacks Decoding and Demonstrates Circuital Design |
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| Tong Jia-bin.FPGA-Based 16 Leige Stacks Decoding and Demonstrates Circuital Design[J].Journal of Xiangfan Vocational and Technical College,2008,7(6):15-17. |
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| Authors: | Tong Jia-bin |
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| Institution: | Tong Jia-bin(Suizhon Vocational , technical college Hubei Sui Zhou 441300,China) |
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| Abstract: | The technology is middle in modern code,make use of FPGA to realize the decoding that absolute dyadic photoelectricity coder Gelei exports yard and to demonstrate a circuit.Wiring design designing the hardware including FPGA originally,circuital hardware function VHDL language designs the scheme and the realization method,as well as adopt the JTAG border scanning testing standard to realize the circuital online system programming(ISP). |
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| Keywords: | FPGA VHDL JTAG ISP |
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