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基于USB2.0和FPGA的高速数据采集卡
引用本文:王鹏,吴尘.基于USB2.0和FPGA的高速数据采集卡[J].南通职业大学学报,2010,24(3):91-94.
作者姓名:王鹏  吴尘
作者单位:苏州市职业大学电子信息工程系,江苏苏州,215104
摘    要:介绍一种采用USB2.0接口与PC机进行数据传输的高速数据采集卡的设计。采集卡由可变增益放大器对采样信号进行预处理,使用异步并行的A/D转换技术实现40 Msps的数据采集,由FPGA实现时序控制和数据高速FIFO,由内嵌MCU的USB控制器实现USB2.0接口功能。文章给出了硬件的基本结构和软件固件设计的基本方法,并对用FPGA设计FIFO作了重点阐述,同时对使用异步并行A/D转换与使用采样率为40 Msps的ADC器件的采样数据在FIFO内的数据传输进行了时序仿真,分析了仿真结果。

关 键 词:USB2.0接口  异步并行A/D转换  FPGA控制  高速数据采集卡  VHDL语言  时序仿真

High Speed Data Acquisition Card Based on USB 2.0 and FPGA
WANG Peng,WU Chen.High Speed Data Acquisition Card Based on USB 2.0 and FPGA[J].Journal of Nantong Vocational College,2010,24(3):91-94.
Authors:WANG Peng  WU Chen
Institution:(Department of Electronic Information Engineering,Suzhou Vocational University,Suzhou 215104,China)
Abstract:A kind of high speed data acquisition card was designed to transmit data based on USB 2.0 Interface and PC.The functionality of the data acquisition card was carried out by ADC,FPGA and USB controller.Controllable gain amplifier was used for pre-processing of sampling signal.40Msps data acquisition was realized by asynchronous parallel A/D conversion technology.The timing sequence controlling and highspeed data FIFO was achieved by FPGA,and the functionality of USB 2.0 Interface was realized by embedded MCU USB controller.The basic structure of hardware and the basic design method for software and firmware were given in this paper,in which how to use FPGA to realize FIFO was elaborated in detail.The timing simulation of using asynchronous parallel A/D conversion technology and using ADC device of 40Msps sampling rate for FIFO internal data transmission were simulated respectively,and the simulation results were analyzed comparatively.
Keywords:USB2  0  asynchronous parallel A/D conversion  FPGA  FIFO  VHDL  timing function
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