| 2.4Kb/s MELP声码器的FPGA实现 |
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| 引用本文： | 时永鹏.2.4Kb/s MELP声码器的FPGA实现[J].洛阳师范学院学报,2011,30(8):47-49. |
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| 作者姓名： | 时永鹏 |
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| 作者单位： | 洛阳师范学院物理与电子信息学院,河南洛阳,471022 |
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| 摘 要： | 设计了一种基于FPGA的MELP声码器,在对MELP算法进行深入分析的基础上,提出了利用DSPBuilder在Matlab中建模并在FPGA上设计声码器的思路及实现过程,最后对编解码系统进行功能仿真,仿真结果表明,合成语音信号与原始信号很好的拟合,系统编解码后语音质量基本良好.
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| 关 键 词： | MELP FPGA 语音编解码 声码器 |
The Implementation of 2.4Kbps MELP Vocoder based on FPGA |
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| SHI Yong-peng.The Implementation of 2.4Kbps MELP Vocoder based on FPGA[J].Journal of Luoyang Teachers College,2011,30(8):47-49. |
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| Authors: | SHI Yong-peng |
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| Institution: | SHI Yong-peng(Physics and Electronic Information Department,Luoyang Normal College,Luoyang 471022,China) |
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| Abstract: | A kind of MELP vocode is designed based on FPGA in this article.Firstly,it expatiates the MELP algorithm,then the idea of modeling and realization process on FPGA by using DSP Builder in Matlab based is proposed.At last we can complete the function simulation of the encoding and decoding system,and the simulation result shows that the synthetical signals fit well with the original ones,and the quality of the speech got from the vocoder is good. |
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| Keywords: | MELP FPGA speech encode and decode vocoder |
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