| 程控分频器的FPGA实现 |
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| 引用本文： | 曾菊容.程控分频器的FPGA实现[J].宜宾学院学报,2011(6):60-62. |
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| 作者姓名： | 曾菊容 |
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| 作者单位： | 宜宾学院物理与电子工程学院,四川宜宾,644000 |
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| 摘 要： | 在给出倍频电路后,将输入时钟进行倍频,以方便实现整数倍的等占空比分频,对于小数分频则采用双模前置方式,利用将小数部分累加的方法,将N及N+1分频器混合均匀,以减小输出信号的相位波动.仿真结果表明,设计的程控分频器可适用于对100MHz以内的信号进行任意分频.
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| 关 键 词： | FPGA 程控分频器 倍频 双模 |
Implementation of PC Frequency Divider Based on FPGA |
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| Authors: | ZENG Ju-rong |
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| Institution: | ZENG Ju-rong(School of Physics and Electronic Engineering,Yinbin University,Yibin 644000,China) |
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| Abstract: | A multiple frequency circuit which can multiply the frequency of clock signal to realize the integer frequency divider with equal duty cycle was designed.The dual-modulus prescaler was used to realize the decimal frequency divider.The way of accumulating the decimal part to mix the N and N＋1 divider was adopted in order to diminish the phase fluctuation of out single.The simulation indicates that the PC frequency divider can realize the arbitrary division of signal with the frequency within 100MHz. |
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| Keywords: | FPGA PC frequency multiple frequency dual-modulus |
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