| 图像缩放IP的FPGA实现 |
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| 引用本文： | 王慧.图像缩放IP的FPGA实现[J].四川教育学院学报,2011,27(11):119-121. |
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| 作者姓名： | 王慧 |
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| 作者单位： | 四川教育学院 网络与信息管理中心,成都,611130 |
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| 摘 要： | 为了降低图像缩放IP的硬件资源占用率并获得最佳的图像缩放质量,采用基于二次函数的三点控制插值算法并利用FPGA实现。阐述该IP的系统架构,重点介绍线性缓存的读写控制和插值算法的优化处理,相比双三次图像插值算法,该IP的FPGA硬件资源占用仅有其一半。
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| 关 键 词： | 图像缩放 插值算法 线性缓存 FPGA |
FPGA Implementation of Image Scaling IP |
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| WANG Hui.FPGA Implementation of Image Scaling IP[J].Journal of Sichuan College of Education,2011,27(11):119-121. |
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| Authors: | WANG Hui |
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| Institution: | WANG Hui(Network and Information Management Center,Sichuan College of Education,Chengdu 611130,China) |
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| Abstract: | The realization of reducing hardware resource utilization of image scaling IP and getting the best image scaling quality are based on a quadratic function of the three control interpolation algorithm and the application of FPGA.This paper describes system architecture of the IP,and highlights read/write control of the linear cache and interpolation algorithm optimization.Compared to the bi-cubic image interpolation algorithm,the FPGA hardware resources of the IP is only half of it. |
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| Keywords: | image scaling interpolation algorithm linear cache FPGA |
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