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Searching for complete set of free resource rectangles on FPGA area based on CPTR |
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| Authors: | CHAI Ya-hui SHEN Wen-feng XU Wei-min LIU Jue-fu ZHENG Yan-heng |
| Institution: | 1. School of Computer Engineering and Science, Shanghai University, Shanghai 200072, P.R.China;School of Information Engineering, East China Jiaotong University, Nanchang 330013, P.R.China 2. School of Computer Engineering and Science, Shanghai University, Shanghai 200072, P.R.China 3. School of Information Engineering, East China Jiaotong University, Nanchang 330013, P.R.China |
| Abstract: | As a coprocessor, field-programmable gate array (FPGA) is the hardware computing processor accelerating the computing capacity of computers. To efficiently manage the hardware free resources for the placing of tasks on FPGA and take full advantage of the partially reconfigurable units, good utilization of chip resources is an important and necessary work. In this paper, a new method is proposed to find the complete set of maximal free resource rectangles based on the cross point of edge lines of running tasks on FPGA area, and the prove process is provided to make sure the correctness of this method. |
| Keywords: | field-programmable gate array(FPGA) partially dynamic reconfigure maximal free rectangle occupied rectangle |
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