| 一种适用于NAND闪存的LDPC译码算法 |
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| 引用本文： | 于彬.一种适用于NAND闪存的LDPC译码算法[J].教育技术导刊,2019,18(7):84-87. |
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| 作者姓名： | 于彬 |
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| 作者单位： | 杭州电子科技大学 通信工程学院，浙江 杭州 310018 |
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| 摘 要： | 由于NAND闪存具有读写速度快、效率高、功耗低等特点，因此被广泛应用于存储领域。为了提高闪存存储的可靠性，提出一种适用于NAND闪存的LDPC译码算法对其进行纠错。基于LDPC码的BP译码简化算法，结合分层算法与归一化最小和（NMS）算法，提出一种改进的行分层最小和算法。仿真结果表明，改进译码算法在不降低译码性能的前提下，减少了迭代次数，加快了译码收敛速度，更有利于硬件电路的实现。
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| 关 键 词： | NAND闪存 LDPC码 分层算法 最小和算法 |
| 收稿时间： | 2018-11-21 |
LDPC Decoding Algorithm for NAND Flash Memory |
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| YU Bin.LDPC Decoding Algorithm for NAND Flash Memory[J].Introduction of Educational Technology,2019,18(7):84-87. |
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| Authors: | YU Bin |
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| Institution: | School of Communication Engineering， Hangzhou Dianzi University， Hangzhou 310018， China |
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| Abstract: | NAND flash memory is widely used in the field of storage due to its characteristics of fast read and write speed， high efficiency and low power consumption. A LDPC decoding algorithm for NAND flash memory is proposed in this paper， the aim is to improve the reliability of flash memory storage. An improved line hierarchical minimization algorithm is proposed. It’s based on BP decoding algorithm， combined with hierarchical algorithm and normalization minimization algorithm， and BP decoding algorithm based on LDPC code. Simulation results show that the improved decoding algorithm without reducing the decoding performance can reduce the number of iterations， speed up the decoding convergence and is more suitable for the implementation of hardware circuits. |
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| Keywords: | NAND flash memory LDPC code layered algorithm min-sum algorithm |
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