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限幅滤波的FPGA实现方法研究
引用本文:焦冬莉.限幅滤波的FPGA实现方法研究[J].雁北师范学院学报,2013(3):31-33.
作者姓名:焦冬莉
作者单位:太原工业学院电子工程系,山西太原030008
基金项目:山西省大学生创新改革项目[2012]
摘    要:限幅滤波法是抑制正交频分复用(OFDM)信号的PAPR的常用硬件实现方法。使用FPGA可缩短系统设计开发时间,提高系统可靠性。本文在用FPGA实现限幅滤波的基础上,讨论了基于FPGA设计时应考虑的主要问题,以及影响设计性能的几个因素,包括:乘法器的设计、算法的优化、芯片的选择等。

关 键 词:限幅滤波器  FPGA  硬件设计  乘法器算法

Research of FPGA-based Design Limiting Amplitude Filter
JIAO Dong-li.Research of FPGA-based Design Limiting Amplitude Filter[J].Journal of Yanbei Teachers College,2013(3):31-33.
Authors:JIAO Dong-li
Institution:JIAO Dong-li (Department of Electronics Engineering,Taiyuan Institute of Technology,Taiyuan Shanxi,030008)
Abstract:The limiting amplitude filtering is a hardware design method to reduce PAPR of orthogonal frequency division multiplexing(OFDM).By using FPGA system design the development time can be shortened and reliability can be improved.In this paper,first the design of limiting amplitude filter based on FPGA is introduced;second,major consideration problem in FPGA-based design is proposed;at last several factors affecting the design performance are discussed,that includes multiplier design,the optimization of the algorithm,and the choice of chips.
Keywords:limiting amplitude filter  FPGA  hardware design  multiplier algorithm
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