The time-delay digital tanlock loop: performance analysis in additive Gaussian noise |
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| Authors: | Zahir M Hussain Boualem Boashash |
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| Institution: | Signal Processing Research Centre, Queensland University of Technology, 2 George Street, Brisbane, Queensland, 4000, Australia |
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| Abstract: | Recently, a new non-uniform sampling digital phase-locked loop, the time-delay digital tanlock loop (TDTL), has been proposed. We have analyzed in a previous work the first- and second-order TDTLs under noise-free conditions. In this work, we analyze the performance of the TDTL in the presence of additive Gaussian noise for different values of the loop parameters. It is shown that the expected value of the steady-state phase errors at the input and the output of the phase error detector are equal to the noise-free steady-state values, while the variance is significantly reduced when the signal-to-noise ratio is increased or the phase shift introduced by the time-delay approaches 90°. The locking ranges of the TDTL parameters under noise-free conditions are unchanged by the presence of noise. |
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| Keywords: | 07 50 E 07 50 H 02 50 |
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