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1.
A low cost of die area and power consumption CMOS image sensor readout circuit with fixed pattern noise(FPN) cancellation is proposed.By using only one coupling capacitor and switch in the double FPN cancelling correlative double sampling(CDS),pixel FPN is cancelled and column FPN is stored and eliminated by the sampleand-hold operation of digitally programmable gain amplifier(DPGA).The bandwidth balance technology based on operational amplifier(op-amp) sharing is also introduced to decrease the power dissipation of traditional multi-stage switched capacitor DPGA.The circuit is designed and simulated using 1P6M 0.18 μm 1.8 V/3.3 V process.Simulation results indicate that the proposed CDS scheme can achieve an FPN of less than 1 mV.The total sampling capacitor per column is 0.9 pF and no column-wise power is dissipated.The die area and FPN value are cut by 70% and 41% respectively compared with amplifier-based CDS.The op-amp sharing gain stage can achieve a 12-bit precision and also implement an 8-bit gain controlling within a gain range of 24 dB.Its power consumption is 1.4 mW,which is reduced by 57% compared with traditional schemes.The proposed readout circuit is suitable for the application of low power cost-sensitive imaging systems.  相似文献   

2.
INTRODUCTION The rapidly increasing application of radio fre- quency identification (RFID) includes supply chain management, access control to buildings, public transportation, airport baggage, and express parcel logistics (Karthaus and Fischer, 2003; Feldhofer, 2004; Glidden et al., 2004). Using an RFID system is a good approach for automated identification of products. RFID system consists of two major components, an interrogator (reader) and a transponder (tag), composed of an ant…  相似文献   

3.
为解决现有曼彻斯特解码中需要加同步头、时钟抖动带来的相位模糊等问题,提出一种新型曼彻斯特解码时钟提取和解码电路.该系统采用DDFS(直接数字频率合成)技术,通过粗同步、细同步分别进行捕获(测量码率)和相位跟踪(锁相).仿真和实验结果表明,该系统在信噪比大于2.4 d B下可以准确的提取时钟和正确解码.  相似文献   

4.
INTRODUCTION Cochlear implants have been very successful in restoring auditory function in individuals who suffer from sensorineural deafness (Rauschecker and Shannon, 2002). A generic cochlear implant usually consists of an external part and an internal part, which are connected by an inductive transcutaneous link, as illustrated in Fig.1. The link sends both data and power to an internal circuit. The output data from a speech processor are modulated and amplified suc-cessively so that…  相似文献   

5.
INTRODUCTION With the development of modern electronics,there is a growing trend of designing a low-voltagehigh precision current reference in many mixed-signaland analog circuits such as data converters (Mehr andSinger, 2000; Oh et al., 2004), oscillators and PLLs(Razavi, 2001; Banba and Shiga, 1999). Low-costreasons need the reference to be realized in simplestandard CMOS logic process technology, withoutresorting to the use of BiCMOS process and specialdevices such as floating-g…  相似文献   

6.
ZVS（zero voltage switching） PWM（pulse width modulation） inverters have attracted much attention recently. The basic idea is to use ZVS circuit as the main circuit of inverter resonance at the beginning of every carrier period so that each power device can commutate when voltage of the main circuit＇s DC bus line is zero. To ensure the resonant circuit to operate properly, sawtooth with alternate slope （positive or negative） is used as carrier. But the time of zero voltage vectors with such PWM pattern is greatly different from traditional hard-switching PWM pattern. This paper discusses the locus of flux linkage under soft-switching PWM pattern by using space voltage vector. It is pointed out that, under the hard-switching PWM pattern, speed of flux linkage is adjusted by zero space voltage vector. When soft-switching PWM pattern is used, however, effective time of space voltage vector varies considerably, sometimes even without zero space voltage vector. Therefore non-zero space voltage vector has been used to make the speed of flux linkage locus equal to that of hard-switching PWM pattern. The cause of current distortion in soft-switching PWM inverters is also discussed. Based on the flux linkage locus circle, corresponding compensation methods are proposed. Experimental results show that the described method can effectively improve output current waveform of inverter.  相似文献   

7.
Undesirable repulsive force between contact members due to both a current path shrink near a real contact area and/or so-called pinch effect is particularly onerous for power switch applications, and results in either contact floating or bouncing which are associated with an electric arc following contact welding. This problem is of great importance for any circuit breaker especially for compact low voltage vacuum circuit breakers. To avoid contact floating at closure and during any inrush current under short circuit conditions, the electrodynamic repulsive force can be employed successfully if we use a special compensation system flexibly combined with the contact itself. However to select and design the compensation system properly, its efficiency has to be known. This paper presents an approach to obtain the electrodynamic force value depending on different shaped (rectangular, square, circle and arch) copper plates used in the compensator by using ANSYS for current values 40 kA RMS. Curve-fitting was done according to the calculating results, the optimization designing of compensation unit is based on them.  相似文献   

8.
Cascade multilevel inverters have been developed for electric utility applications. A cascade M-level inverter consists of (M-1)/2 H-bridges in which each bridge's dc voltage is supported by its own dc capacitor. The new inverter can: (1) generate almost sinusoidal waveform voltage while only switching one time per fundamental cycle; (2) dispense with multi-pulse inverters' transformers used in conventional utility interfaces and static var compensators; (3) enables direct parallel or series transformer-less connection to medium- and high-voltage power systems. In short, the cascade inverter is much more efficient and suitable for utility applications than traditional multi-pulse and pulse width modulation (PWM) inverters. The authors have experimentally demonstrated the superiority of the new inverter for power supply, (hybrid) electric vehicle (EV) motor drive, reactive power (var) and harmonic compensation. This paper summarizes the features, feasibility, and control schemes of the cascade inverter for utility applications including utility interface of renewable energy, voltage regulation, var compensation, and harmonic filtering in power systems. Analytical, simulated, and experimental results demonstrated the superiority of the new inverters.  相似文献   

9.
The authors have fabricated bottom gate amorphous silicon thin film transistor (a-Si TFT) array using five-step lithography process.The device shows a field effect mobility of 0.43 cm 2 /(V·s),on/off ratio of 7.5×10 6 and threshold voltage of 0.87 V.The instability of a-Si TFT is ascribed to the defect state in the a-Si channel and SiNx/a-Si interface.The present a-Si TFT array with SiN x insulator could be a significant step towards the commercialization of active matrix organic lighting diode (AM-OLED) te...  相似文献   

10.
Applications of cascade multilevel inverters   总被引：1，自引：0，他引：1  
INTRODUCTIONRecently,flexiblealternatingcurrenttrans missionsystems (FACTS) ,custompower,andpowerqualityhavebeenhottopicsbecauseoftheincreasingpowerdemand ,thewidespreaduseofnon linearelectronicequipment,andthehigherpowerqualityrequirementsofsensitiveload…  相似文献   

11.
高速ADC电路的电磁兼容设计   总被引：3，自引：0，他引：3  
针对高速ADC电路设计的特点，重点讨论了包含高速ADC的硬件电路设计中印刷电路板布局时所必须引起注意的电磁兼容问题，包括数字地和模拟地、数字电源和模拟电源的隔离，ADC输入信号、输出信号的处理以及采样时钟的处理等，并给出了一个成功布局的例子。  相似文献   

12.
设计了太阳能光伏发电铅蓄电池充电的简易实验教学平台,由光伏电池板、充电控制器、阀控式铅蓄电池和变阻箱负载构成。以近似梯度值计算代替一阶求导,提出了一种变步长的电压扰动观察法来实现太阳能光伏发电最大功率点跟踪(MPPT)。以STM8S105单片机为控制器核心,采用Buck直流降压斩波主电路,结合铅蓄电池四阶段充电方式,进行系统硬件和软件设计。测试表明,该实验平台具有MPPT功能,造价较低、结构简单、性能良好、易于操作和维护,能够满足实验教学的要求。  相似文献   

13.
The clock generator and OOK modulator for RFID (Radio Frequency Identification) presented in this paper consist of a current source and delay elements. The simple constant-gm structure is adopted in the current source design and the current consumption of the current source is only about 2 μA. The delay elements, the clock generator and OOK modulator are introduced in detail in the paper. The designed circuits are fabricated by 0.6 μm CMOS process. The area of the core circuit is only about 400 μmμ0 μm. The delay time of all three samples is in the range of 9 μs to 21 μs when the supply voltage varies from 2 V to 4 V. As the measured results satisfy the system requirements, these circuit structures are suitable for RFID application.  相似文献   

14.
An integrated laser diode driver(LDD) driving an edge-emitting laser diode was designed and fabricated by 0.35 μm BiCMOS technology. This paper proposes a scheme which combines the automatic power control loop and temperature com-pensation for modulation current in order to maintain constant extinction ratio and average optical power. To implement tem-perature compensation for modulation current,a novel circuit which generates a PTAT current by using the injecting base current of a bipolar transistor in saturation region,and alternates the amplifier feedback loop(closed or not) to control the state of the current path is presented. Simulation results showed that programmed by choice of external resistors,the IC can provide modu-lation current from 5 mA to 85 mA with temperature compensation adjustments and independent bias current from 4 mA to 100 mA. Optical test results showed that clear eye-diagrams can be obtained at 155 Mbps,with the output optical power being nearly constant,and the variation of extinction ratio being lower than 0.7 dB.  相似文献   

15.
We propose a novel high-performance hardware architecture of processor for elliptic curve scalar multiplication based on the Lopez-Dahab algorithm over GF（2^163） in polynomial basis representation. The processor can do all the operations using an efficient modular arithmetic logic unit, which includes an addition unit, a square and a carefully designed multiplication unit. In the proposed architecture, multiplication, addition, and square can be performed in parallel by the decomposition of computation. The point addition and point doubling iteration operations can be performed in six multiplications by optimization and solution of data dependency. The implementation results based on Xilinx VirtexⅡ XC2V6000 FPGA show that the proposed design can do random elliptic curve scalar multiplication GF（2^163） in 34.11 μs, occupying 2821 registers and 13 376 LUTs.  相似文献   

16.
分析了感应加热装置中逆变器的功率器件IGBT关断时浪涌电压产生的原因以及4种关断缓冲电路中功率器件通断时电路的工作过程和特点，给出了选取缓冲电路的注意事项．  相似文献   

17.
To investigate the influence of microwave radiation on the human fibroblast nuclei, the effects of three variants of electromagnetic wave polarization, linear and left-handed and right-handed elliptically polarized, were examined. Experimental conditions were: frequency (f) 36.65 GHz, power density (P) at the surface of exposed object 1, 10, 30, and 100 μW/cm2, exposure time 10 s. Human fibroblasts growing in a monolayer on a cover slide were exposed to microwave electromagnetic radiation. The layer of medium that covered cells during microwave exposure was about 1 mm thick. Cells were stained immediately after irradiation by 2% (w/v) orcein solution in 45% (w/v) acetic acid. Experiments were made at room temperature (25 °C), and control cell samples were processed in the same conditions. We assessed heterochromatin granule quantity (HGQ) at 600× magnification. Microwave irradiation at the intensity of 1 μW/cm2 produced no effect, and irradiation at the intensities of 10 and 100 μW/cm2 induced an increase in HGQ. More intense irradiation induced more chromatin condensation. The right-handed elliptically polarized radiation revealed more biological activity than the left-handed polarized one.  相似文献   

18.
Using composite field arithmetic in Galois field can result in the compact Rijndael S-Box. However, the power con- sumption of this solution is too large to be used in resource-limited embedded systems. A full-custom hardware implementation of composite field S-Box is proposed for these targeted domains in this paper. The minimization of power consumption is implemented by optimizing the architecture of the composite field S-Box and using the pass transmission gate (PTG) to realize the logic functions of S-Box. Power simulations were performed using the netlist extracted from the layout. HSPICE simulation results indicated that the proposed S-Box achieves low power consumption of about 130 μW at 10 MHz using 0.25 μm/2.5 V technology, while the consumptions of the positive polarity reed-muller (PPRM) based S-Box and composite field S-Box based on the conventional CMOS logic style are about 240 μW and 420 μW, respectively. The simulations also showed that the presented S-Box obtains better low-voltage operating property, which is clearly relevant for applications like sensor nodes, smart cards and radio frequency identification (RFID) tags.  相似文献   

19.
电压质量监测分析仪,是一种测量电压和电压畸变率、分析电压质量的仪表,能对读入的电压信号进行转换处理,在时钟的同步控制下,自动监测、统计和分析各项统计值并存储,供用户选择读出,同时可对多种电压信号进行采集、显示、分类统计,是电力系统监测、考核电网电压质量的必备工具之一.但是,现有的电压质量监测分析仪在测量电压时,是通过单独的模数转换器芯片采样后,再经过CPU处理完成的,采用模数转换器芯片对测量信号采样的成本高,同时外围电路庞大而复杂.该文研究并实现了电压质量监测分析仪,给出了主要硬件电路和软件实现方法,在不采用单独的模数转换器芯片的前提下,依然可以准确的测量电压和电压畸变率,分析电压质量,同时内部的电路结构得到了简化,成本得到了降低.  相似文献   

20.
Low power adder circuits ,SERF,10T-Ⅰ，10T-Ⅱ,10T-Ⅲ and a complementary adder (28T) at physical layout level are evaluated.Simulations based on the extracted adder circuit layouts are run to assess how various circuit setups can impact the speed and power consumption.In addition,impacts of output inveners on the circuit perfomance of modified SERF and 10T adders due to threshold loss problem are also examined.Differences among these adders are addressed and applications of these adders are suggested.  相似文献   

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