共查询到20条相似文献，搜索用时 15 毫秒
1.
A wideband dual-feedback low noise amplifier(LNA) was analyzed, designed and implemented using SiGe heterojunction bipolar transistor(HBT) technology. The design analysis in terms of gain, input and output matching, noise and poles for the amplifier was presented in detail. The area of the complete chip die, including bonding pads and seal ring, was 655 μm×495 μm. The on-wafer measurements on the fabricated wideband LNA sample demonstrated good performance: a small-signal power gain of 33 dB with 3-dB bandwidth at 3.3 GHz was achieved;the input and output return losses were better than-10 dB from 100 MHz to 4 GHz and to 6 GHz, respectively; the noise figure was lower than 4.25 dB from 100 MHz to 6 GHz; with a 5 V supply, the values of OP1 dB and OIP3 were1.7 dBm and 11 dBm at 3-dB bandwidth, respectively. 相似文献
2.
A fully integrated frequency synthesizer with low jitter and low power consumption in 0.18 μm CMOS (complementary metal-oxide semiconductor) technology is proposed in this paper.The frequency synthesizer uses a novel single-end gain-boosting charge pump, a differential coupled voltage controlled oscillator (VCO) and a dynamic logic phase/frequency detecor (PFD) to acquire low output jitter.The output frequency range of the frequency synthesizer is up to 1 200 MHz to 1 400 MHz for GPS (global position system) application.The post simulation results show that the phase noise of VCO is only 127.1 dBc/Hz at a 1 MHz offset and the Vp-p jitter of the frequency synthesizer output clock is 13.65 ps.The power consumption of the frequency synthesizer not including the divider is 4.8 mW for 1.8 V supply and it occupies a 0.8 mm×0.7 mm chip area. 相似文献
3.
ZENG Yong-hong ZOU Xue-cheng LIU Zheng-lin LEI Jian-ming 《浙江大学学报(A卷英文版)》2007,8(10):1553-1559
Using composite field arithmetic in Galois field can result in the compact Rijndael S-Box. However, the power con- sumption of this solution is too large to be used in resource-limited embedded systems. A full-custom hardware implementation of composite field S-Box is proposed for these targeted domains in this paper. The minimization of power consumption is implemented by optimizing the architecture of the composite field S-Box and using the pass transmission gate (PTG) to realize the logic functions of S-Box. Power simulations were performed using the netlist extracted from the layout. HSPICE simulation results indicated that the proposed S-Box achieves low power consumption of about 130 μW at 10 MHz using 0.25 μm/2.5 V technology, while the consumptions of the positive polarity reed-muller (PPRM) based S-Box and composite field S-Box based on the conventional CMOS logic style are about 240 μW and 420 μW, respectively. The simulations also showed that the presented S-Box obtains better low-voltage operating property, which is clearly relevant for applications like sensor nodes, smart cards and radio frequency identification (RFID) tags. 相似文献
4.
A differential cross-coupled regulated cascode(RGC)transimpedance amplifier(TIA)is proposed. The theory of multi-stage common-source(CS) configuration as an auxiliary amplifier to enhance the bandwidth and output impedance of RGC topology is analyzed. Additionally, negative Miller capacitance and shunt active inductor compensation are exploited to further expand the bandwidth. The proposed RGC TIA is simulated based on UMC 0.18 μm standard CMOS process. The simulation results demonstrate that the proposed TIA has a high transimpedance of 60.5 d B?, and a-3 d B bandwidth of 5.4 GHz is achieved for 0.5 p F input capacitance. The average equivalent input noise current spectral density is about 20 p A/Hz~(1/2) in the interested frequency, and the TIA consumes 20 m W DC power under 1.8 V supply voltage. The voltage swing is 460 m V pp, and the saturation input current is 500 μA. 相似文献
5.
We present a new sense amplifier circuit for EEPROM memory. The topology of the sense amplifier uses a voltage sensing method, having low cost and low power consumption as well as high reliability. The sense amplifier was implemented in an EEPROM realized with an SMIC 0.35-μm 2P3M CMOS embedded EEPROM process. Under the condition that the power supply is 3.3 V, simulation results showed that the charge time is 35 ns in the proposed sense amplifier, and that the maximum average current consumption during the read period is 40 μA. The novel topology allows the circuit to function with power supplies as low as 1.4 V. The sense amplifier has been implemented in 2-kb EEPROM memory for RFID tag IC applications, and has a silicon area of only 240 μm^2. 相似文献
6.
Power optimization for pipelined analog-to-digital converter(ADC) was studied. Operational principle of pipelined ADC was discussed and noise voltage caused by two important thermal noise sources, sampling switch and amplifier, was quantitatively analyzed. Method used to minimize power and the values under simple model were presented. Power can be saved by making the sampling and feedback capacitors scale down in the pipeline. And the size of capacitors was limited by thermal noise in high resolution ADC. The equivalent circuits of the two important thermal noise sources were established. Thermal noise was optimally distributed among the pipeline stages, and the relationship between scaling factor and closed loop gain was obtained for minimum power dissipation. Typical closed loop gain was 2 or 4 in pipeline ADC, and the corresponding scaling factor was 1.217 and 1.317. These results can serve as useful guidelines for designers to minimize the ADC‘s power consumption. 相似文献
7.
《浙江大学学报(A卷英文版)》2021,(1)
Noise generated by trains running on elevated lines creates many disturbances to the normal lives of surrounding residents. Investigations have shown that people living along elevated lines complain that the noise is sometimes unbearable. To better control the noise and optimize the acoustic environment, noise spectrum characteristics were analyzed and compared with a field test and a numerical simulation. Through an energy analysis of the noise on the bridge side, the energy distribution characteristics of the noise at specific measuring points in different frequency bands were obtained. The influence of the Doppler effect on frequency shift was analyzed. Based on the partial coherence theory, a multi-input and single-output program was compiled to calculate the correlation and contribution degree of the bridge structure-borne noise and wheel/rail noise at the one-third octave center frequency. The results show that the peak noises of the bridge and the wheel/rail are concentrated at 31.5–63 Hz and 400–800 Hz, respectively. For environmental noise on the bridge side, the frequency band above 250 Hz is mainly affected by the wheel/rail noise. In areas of noise source strength, the relative ratio of noise energy above 250 Hz can reach 83.4%. Noise in the near ground and far bridge area is mainly low-frequency, and the relative energy ratio is about 8.9%. The Doppler effect has an influence of less than 6% on the frequency shift with a speed of 67.9 km/h. In the low-frequency band below 250 Hz, the noise in the acoustic shadow area near the bridge and the ground is mainly contributed to by the vibration-radiated noise of the bridge, of which the contribution of the bottom panel is the most prominent. The noise in the comprehensive noise area of the far bridge is mainly caused by the structure-borne noise of the bridge, and the contribution of each bridge panel is different. This study can provide a reference for finding the source of elevated rail noise in some challenging frequency ranges and for then determining optimal designs and measures for noise reduction. 相似文献
8.
A physical model of sinusoidal function was established. It is generalized that the force is directly proportional to a power function of the distance in a classical spring-oscillator system. The differential equation of the generalized model was given Simulations were conducted with different power values. The results show that the solution of the generalized equation is a periodic function. The expressions of the amplitude and the period （frequency） of the generalized equation were derived by the physical method. All the simulation results coincide with the calculation results of the derived expressions. A special function also was deduced and proven to be convergent in the theoretical analysis. The limit value of the special function also was derived. The generalized model can be used in solving a type of differential equation and to generate periodic waveforms. 相似文献
9.
Anders Eriksen D. Osinski D. R. Hjelme 《上海大学学报(英文版)》2014,(1):88-94
We have carried out at laboratory test to study the feasibility of using thermal radiation detectors for online thermal monitoring of electrical systems in wind turbines. A 25 kW frequency converter is instrumented with a thermal camera, operating in the 8-14 μm wave- length range, and a single-pixel thermopile sensor, operating in the 4-8 μm wavelength range, to monitor the temperature development of the power electronics under various load sequences. Both systems performed satisfactorily with insignificant temperature deviations when compared to data from calibrated point contact sensor. With spatial averaging over a 7 mm × 7 mm for the camera and temporal averaging over 60 s for the thermo- pile sensor, we reduce the root mean square noise to 45 mK and 68 mK respectively. The low cost and simple operation of the thermopile sensor make it very attractive for condition monitoring applications, whereas the attractive feature of the camera is the possibility of multi-point or distributed temperature measurements. 相似文献
10.
A 16×16 micro-strip antenna array with high gain characteristic was proposed for the 5.5 GHz WiMAX application. The T-junctions with a power ratio of 2∶1 were used to design the feed network. To correct the stepped discontinuity of impedance change in common multi-section impedance transformer, exponential line matching transformers were adopted in the WiMAX frequency band. The reflection coefficient was lower than-15 dB from 5.08 GHz to 5.87 GHz. The measured gain of the antenna array achieved 29.8 dBi on E-plane at 5.8 GHz. 相似文献
11.
A high-speed dual-modulus divide-by-32/33 prescaler has been developed using 0.25μm CMOS technology. The source-coupled logic (SCL) structure is used to reduce the switching noise and to ameliorate the power-speed tradeoff. The proposed prescaler can operate at high frequency with a low-power consumption. Based on the 2.5 V, 0.25μm CMOS model, simulation results indicate that the maximum input frequency of the prescaler is up to 3.2 GHz. Running at 2.5 V, the circuit consumes only 4.6 mA at an input frequency 2.5 GHz. 相似文献
12.
An adaptive ramp generator based on linear histogram was proposed for the built-in selftest （BIST） of analog to digital convertor （ADC） in CMOS image sensor. By comparing the generated ramp signal to a reference voltage and feeding back a calibration signal, the slope adjustment was implemented, and high linearity and precision of ramp slope were realized. By modulating the pulse width and reference voltage, sweep length varied from microsecond to second and signal swing could reach 3 V with 5.6 mW power consumption. The ramp was used as input to an ideal 10-bit single-slope ADC, and the corresponding DNL and INL were 0.032 LSB and 0.078 LSB, respectively. 相似文献
13.
The combined use of dry cooling （DC） system and dedicated ventilation （DV） system to decouple cool-ing and dehumidification process for energy efficiency was proposed for subtropical climates like Hong Kong. In this study, the energy performance and condensation risk of the use of DCDV system were examined by analyzing its ap-plication in a typical office building in Hong Kong. Through hour-by-hour simulation using actual equipment per-formance data and realistic building and system characteristics, it was found that with the use of DCDV system, the annual energy consumption could be reduced by 54%in comparison with the conventional system （constant air vol-ume with reheat system）. In respect of condensation risk, it was found that the annual frequency of occurrence of con-densation on DC coil was 35 h. Additional simulations were conducted to examine the influence of different parame-ters on the condensation risk of DCDV system. Measures to ensure condensate-free on DC coil were also discussed. 相似文献
14.
A novel frequency hopping(FH) sequences generator based on advanced encryption standard(AES) iterated block cipher is proposed for FH communication systems.The analysis shows that the FH sequences based on AES algorithm have good performance in uniformity, correlation, complexity and security.A high-speed, low-power and low-cost ASIC of FH sequences generator is implemented by optimizing the structure of S-Box and MixColumns of AES algorithm, proposing a hierarchical power management strategy, and applying the dynamic clock gating technology based on finite state machine and clock gating.SMIC 0.18 μm standard CMOS technology shows that the scale of ASIC is only about 10.68 kgate, power consumption is 33.8 μW/MHz, and the maximum hop-rate is 1 098 901 hop/s.This design is suitable for portable FH communication system for its advantages in high-security and hop-rate, low-power and low-cost.The proposed FH sequences generator has been employed in Bluetooth SoC design. 相似文献
15.
A switched-current sample-and-hold circuit with low charge injection was proposed. To obtain low noise and charge injection, the zero-voltage switching was used to remove the signal-dependent charge injection, and the signal-independent charge injection was reduced by removing the feed-through voltage from the input port of the memory transistor directly. This current sample-and-hold circuit was implemented using CMOS 180 nm 1.8 V technology. For a 0.8 MHz sinusoidal signal input, the simulated signal-to-noise and distortion ratio and total harmonic distortion were improved from 53.74 dB and -51.24 dB to 56.53 dB and -54.36 dB at the sampling rate of 20 MHz respectively, with accuracy of 9.01 bit and power consumption of 0.44 mW. 相似文献
16.
The most dominant error source for microwave ranging is the frequency instability of the oscillator that generates the carrier phase signal. The oscillator noise is very difficult to filter due to its extremely low frequency. A dual transponder carrier ranging method can effectively minimize the oscillator noise by combing the reference phase and the to-and-fro measurement phase from the same single oscillator. This method does not require an accurate time tagging system, since it extracts phases on the same satellite. This paper analyzes the dual transponder carrier ranging system by simulation of the phase measurements with comprehensive error models. Both frequency domain and time domain noise transfer characteristics were simulated to compare them with dual one-way ranging. The simulation results in the two domains conformed to each other and demonstrated that a high level of accuracy can also be achieved by use of the dual transponder carder ranging system, with relatively simple instruments. 相似文献
17.
This paper presented an automatic gain control(AGC) circuit suitable for FM/cw ladar. The proposed architecture was based on two-stage variable gain amplifier(VGA) chain with a novel DC offset canceller circuit, which contained an improved Gilbert cell and a Gm-C feedback loop. To keep the VGA with a linearity in dB characteristic, an improved exponential gain control circuit was introduced. The AGC was implemented in 0.18 μm standard CMOS process. Simulation and measurement results verified that its gain ranged from-20 dB to 30 dB, and bandwidth ranged from 100 kHz to 10 MHz. Its power consumption was 19.8 mW under a voltage supply of 3.3 V. 相似文献
18.
A new energy harvester using a piezoelectric and suspension electromagnetic mechanism 总被引：1，自引：0，他引：1
This study presents a new design of a piezoelectric-electromagnetic energy harvester to enlarge the frequency bandwidth and obtain a larger energy output. This harvester consists of a primary piezoelectric energy harvesting device, in which a suspension electromagnetic component is added. A coupling mathematical model of the two independent energy harvesting techniques was established. Numerical results show that the piezoelectric-electromagnetic energy harvester has three times the bandwidth and higher power output in comparison with the corresponding stand-alone, single harvesting mode devices. The finite element models of the piezoelectric and electromagnetic systems were developed, respectively. A finite element analysis was performed. Experiments were carried out to verify the validity of the numerical simulation and the finite element results. It shows that the power output and the peak frequency obtained from the numerical analysis and the finite element simulation are in good agreement with the experimental results. This study provides a promising method to broaden the frequency bandwidth and in- crease the energy harvesting power output for energy harvesters. 相似文献
19.
A low cost of die area and power consumption CMOS image sensor readout circuit with fixed pattern noise(FPN) cancellation is proposed.By using only one coupling capacitor and switch in the double FPN cancelling correlative double sampling(CDS),pixel FPN is cancelled and column FPN is stored and eliminated by the sampleand-hold operation of digitally programmable gain amplifier(DPGA).The bandwidth balance technology based on operational amplifier(op-amp) sharing is also introduced to decrease the power dissipation of traditional multi-stage switched capacitor DPGA.The circuit is designed and simulated using 1P6M 0.18 μm 1.8 V/3.3 V process.Simulation results indicate that the proposed CDS scheme can achieve an FPN of less than 1 mV.The total sampling capacitor per column is 0.9 pF and no column-wise power is dissipated.The die area and FPN value are cut by 70% and 41% respectively compared with amplifier-based CDS.The op-amp sharing gain stage can achieve a 12-bit precision and also implement an 8-bit gain controlling within a gain range of 24 dB.Its power consumption is 1.4 mW,which is reduced by 57% compared with traditional schemes.The proposed readout circuit is suitable for the application of low power cost-sensitive imaging systems. 相似文献
20.
An explosion-proof dual throttling air-conditioning system was put forward to solve the heat dissipation and internal dewing problems of explosion-proof frequency converter in the underground coal mine. This study investigated the feasibility and benefits of explosion-proof dual throttling cooling and dehumidification air-conditioning system applied to the explosion-proof frequency converter. The physical model of dual throttling air-conditioning system was established and its performance parameter was described by mathematical method. The design calculation of the system has also been done. The experimental result showed that the system reached the steady state at the refrigeration mode after running 45 min, and the maximum internal temperature of the flame-proof cavity was 31.0 ℃. The system reached the steady state at the dehumidification mode after running 37 min. The maximum internal relative humidity and temperature of the flame-proof cavity were 33.4% and 36.3 ℃, respectively. Therefore, the proposed system had excellent ability of heat dissipation and avoided internal dewing. Compared with water cooling system, it was more energy-saving and economical. The airflow field of dual throttling air-conditioning system was also studied by CFD simulation. It was found that the result of CFD numerical simulation was highly consistent with the experimental data. 相似文献